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Below is a table:

Pmod P1 Pin	Signal Schematic Name	FPGA Pin
1	P0_IO1	AD9
2	P0_IO2	AD11
3	P0_IO3	AD12
4	P0_IO4	AC12
5	GND
6	3.3V
7	P0_IO5	AC9
8	P0_IO6	AD10
9	P0_IO7	AA12
10	P0_IO8	AB12
11	GND
12	3.3V

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