Notes for AXE5 Eagle - ArrowElectronics/Agilex-5 GitHub Wiki
Table of Contents
Kit Revisions
Development Kit Contents
Development Kit status
Kit Revisions
- AXE5-Eagle-ES0 (PCB Revision: TEI0185-02)
- AXE5-Eagle-ES (PCB Revision: TEI0185-03)
Development Kit Contents
Item | AXE5-Eagle-ES0 | AXE5-Eagle-ES |
---|---|---|
Arrow Blaster (1) | Y | Y |
Micro USB cable (Arrow Blaster) | N | Y |
Micro USB cable (HPS UART) | N | Y |
Power supply (2) | N | Y |
Cooling fan (3) | N | N |
Heatsink (4) | N | Y |
Ethernet Cable | N | N |
SD card (5) | N | N |
(1) Arrow Blaster is compatible with Windows Operating Systems. Not compatible with Linux. If using Linux, use an Intel FPGA Download Cable II. If the Quartus programmer tool is unable to detect the Arrow USB Blaster, follow the instructions in section "Installing Instruction of the newest version" from the following. https://wiki.trenz-electronic.de/display/PD/Arrow+USB+Programmer#ArrowUSBProgrammer-InstallingInstructionofthenewestversion
(2) 12V, 40W, 2.5mm barrel.
(3) Manufacturer: CUI Devices Part number: CFM-3010B-1130-373-22 (customized fan for AXE5-Eagle: CFM-3010B-1130-373-22-C1) 4 wire (GND, VCC, Tach, PWM) 12V - Can be ordered separately.
(4) Manufacturer: Advanced Thermal Solutions Inc. (ATS) Part number: ATS-61325W-C2-R0 MaxiGrip clip mounting
(5) 8GB SD card
Development Kit status
The current status of the development kit is listed below.
FPGA Features | Validated Hardware Support | AXE5-Eagle-ES0 |
---|---|---|
Configuration | JTAG, ASx4 | Y |
Configuration | CvP | N |
FPGA EMIF | LPDDR4 x 32 | Y |
PCIe | 3.0 EP | In progress |
Transceivers | 1x10G PMA-Direct | Y |
SFPA *** | EHIP 10G | Y |
SFPB *** | EHIP 10G | Y |
MIPI | MIPI D-PHY | In progress |
FMC ** | Loopback mode | Y |
CRUVI HS | Loopback mode | Y |
CRUVI LS | Loopback mode | Y |
HDMI | FPGA | In progress |
** The FMC signals are connected to the High-Speed I/O (HSIO) bank in the FPGA (1.2 or 1.3 Volts).
FMC Mezzanine cards plugged into the Eagle board FMC connector must be FMC compliant.
*** SFPA & SFPB are driven by transceivers located in FPGA bank 1C. Only one 10G Ethernet Hard IP (EHIP) is available in bank 1. Use soft 10G EHIP IP to drive the second SFP.
HPS Features | Validated Hardware Support | AXE5-Eagle-ES0 |
---|---|---|
HPS EMIF | LPDDR4 x 32 | Y |
HPS UART | U-Boot, Linux | Y |
HPS SD | U-Boot, Linux | Y |
HPS I2C0, I2C1 | U-Boot, Linux | Y |
HPS I3C | Linux | N |
HPS EMAC0 | Linux | N ** |
HPS EMAC2 | Linux | Y |
HPS USB 3.1 | U-Boot, Linux | Y (2.0 mode only) *** |
HPS USB 2.0 | U-Boot, Linux | N |
HPS LWH2F | U-Boot | Y |
HPS H2F | U-Boot | Y |
HPS F2S | U-Boot | Y (w/adapter 64-bit only) |
HPS F2A | N |
*** USB 3.1 SuperSpeed functionality is not available with AXE5-Eagle-ES0 and AXE5-Eagle-ES releases. It will be available with the AXE5-Eagle release.