Accelerometer Temperature Power Reference Design AXE5000 - ArrowElectronics/Agilex-5 GitHub Wiki
Introduction
This reference design demonstrates a few features of the Agilex-5 and the AXE5000 evaluation board. The software running on the NIOS-V processor implements 2 demos. When switching between demos, push-button S2 needs to be pressed. A red LED (D10) is always blinking to indicate the sign of life.
Demo #1: DIP_SW[0] is OFF.
- Uses the LIS3DH 3-axis accelerometer, mounted on the AXE5000, to read the x, y, and z axes values
- Use a PWM to illuminate the R, G, and B colors of an RGB LED proportionate to the values read
- When the board is inactive for about 5 seconds, the RGB LED goes into flashing a specific pattern
- When the board is being moved, the RGB LED displays the 3 colors corresponding to the tilt data
Demo #2: DIP_SW[0] is ON.
- Requires a terminal emulator to display data sent over a UART at 115200 baud rate
- The FPGA temperature sensors (4 regions) are read via the SDM and displayed
- The FS1606-0600 power module Vin, Vout, and Iout feeding the FPGA core voltage (0.75V) are read via I2C and displayed
Block Diagram
The reference design includes
- Nios V/m Microcontroller
- Onchip RAM (256KB)
- Light-Weight UART
- I2C
- System ID peripheral
- Push-Button
- DIP switches
- Custom PWM
Prerequisites
- Review Getting Started
- Host machine running Linux or Windows.
- Internet connection to download the tools and clone the repositories from github. If you are behind a firewall you will need your system administrator to enable you to get to the git trees.
- Quartus Prime Pro version 25.1 (with NIOS-V license)
- Ashling RiscFree IDE for Intel FPGAs 25.1, if modifying software
Set up the Environment
Open a shell (niosv command shell for Windows)
$ mkdir agilex_5
$ cd agilex_5
Build the Quartus Reference Design
This can be built under Windows or Linux.
Clone the repository. Open a shell (niosv command shell for Windows)
$ git clone -b QPDS25.1_QPDS_REL_PR https://github.com/ArrowElectronics/refdes-agilex5 refdes-agilex5
$ cd refdes-agilex5/axe5000/accel_temp_refdes
Open Quartus and load the Project located in the folder shown above
$ File --> Open Project. Select axe5000_top.qpf
Add pin assignments
$ View --> Console
$ In the Tcl Console window type 'source sources/axe5000_pin_assignment.tcl' and press Enter
Compile the Quartus project
$ Processing --> Start Compilation
The following file is created:
- agilex_5/refdes-agilex5/axe5000/accel_temp_refdes/axe5000_top.sof
Configure the Board for the Demo
The following components are required for the demo:
- AXE5000 (TEI0181) development board,
- USB C Cable
Assemble the Hardware
- Plug the USB Cable into J9, the USB C connector.
Program the FPGA configuration file
Open the Quartus Programmer
$ Tools --> Programmer
Detect the JTAG chain
$ Processing --> Auto Detect
Select the A5EC008BM16AE device in the topology diagram
Program the device
$ Edit --> Change File. Select axe5000_top.sof
$ Click the 'Program/Configure' check box.
$ Processing --> Start
This will take a few seconds to complete.
The .hex code running on the NIOS-V is already incorporated into the .sof file.
Open a terminal (for Demo #2 only)
$ Open Tera-Term or equivalent terminal program
$ set its baud rate to 115200
$ Press S2 button to refresh measurements
Each time S2 is pressed, the readings are refreshed.