AXE5 GoldenEagle block diagrams - ArrowElectronics/Agilex-5 GitHub Wiki

AXE5-GoldenEagle Block Diagram

The AXE5-GoldenEagle board contains an SoC FPGA device and many peripheral devices.



Top Board View



Intel Agilex 5 E-Series SoC

The Agilex-5 E-Series group A device is a 656KLE A5ED065AB32AE1S SoC FPGA.

  • HPS:
    • Dual ARM® A55 and Dual ARM® A76 CPUs
    • Up to 1.5 GHz max clock speed
    • Cortex-A55: 1.50 GHz, 32 KB L1, 128KB L2 Cache
    • Cortex-A76: 1.80 GHz, 64KB L1, 256KB L2 Cache
    • 2 MB shared L3 Cache
    • 48 Dedicated HPS I/O pins
    • 4 Hard Memory Controllers (LPDDR4, DDR4, LPDDR5)
  • FPGA Fabric:
    • 656,080 Logic Elements (LE)
    • 1,611 (31.46Mb) M20K Memory
    • 11,120 (6.79Mb) MLAB Memory
    • 1,692 18x19 Multipliers
    • 120 HVIO (1.8V - 3.3V) I/O pins
    • 384 HSIO (1.05V - 1.3V) I/O pins
    • 4 Hard Memory Controllers (LPDDR4, LPDDR5, DDR4), x32
    • 28 MIPI D-PHY channels
    • 24x 28.1Gbps Transceivers
    • 6x PCIe Gen4 Hard blocks
    • 6x 10Gb EMAC Hard IP blocks
    • 2nd generation Intel Hyperflex Core architecture

FPGA LPDDR4
HPS LPDDR4
FMC+ Connector
CRUVI HS
CRUVI LS
PMOD
ADIN1300 Ethernet PHY
RJ-45 Ethernet Connector
USB PHY
USB HUB
dual USB-A Connector
TFP410 HDMI Transmitter
HDMI Connector
USBC to UART/JTAG Connector
FPGA 2x Push Button
HPS 2x Push Button
2x HPS LEDs
4x FPGA RGB LEDs
HPS 2x DIP Switch
FPGA 2x DIP Switch
12 VDC Power Jack
Si5332A Programmable Clock Generator
QSPI for Configuration (back side)
2x 10Gb SFP+ cages
M.2 Connector
PCIe Gen4 x4 Edge Connector
2x 22-pin FPC MIPI CSI-2 Connectors
Temperature Sensors (back side)
CRUVI GTX Connector
microSD Card Connector
MAX31760 Fan-speed Controller and Connector



Return - AXE5-GoldenEagle Development Platform
Return - Developer Resources Page

⚠️ **GitHub.com Fallback** ⚠️