5: Simulation Flow Manager - AmeerAbdelhadi/Indirectly-Indexed-2D-Binary-Content-Addressable-Memory-BCAM GitHub Wiki
`./sim <Pattern width List> <CAM depth list> <#Cycles> <Verbose?>`
- Use comma delimited lists; no space; can be surrounded by brackets (), [], {}, <>
- CAM depth (k-lines), pattern width (9-bits) & #cycles are positive integers
- Verbose? (Binary; 0/1)
-
./sim 1 8 1000000 1- Simulate 1M cycles of a 8K lines CAM, 9 bits pattern width ,verbosed
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./sim 4,8 2,4 1000000 0- Simulate 1M cycles of CAMs with 2k or 4k lines, 36, 73, not verbosed
The following files and directories will be created after simulation :
- sim.res : A list of simulation results, each run in a separate line, including all design styles