1: Intro - AmeerAbdelhadi/Indirectly-Indexed-2D-Binary-Content-Addressable-Memory-BCAM GitHub Wiki

- Modular SRAM-based Indirectly-indexed 2D -##

Binary Content Addressable Memory II2DCAM

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Ameer M. S. Abdelhadi and Guy G. F. Lemieux

The University of British Columbia (UBC) 2014

{ ameer.abdelhadi; guy.lemieux } @ gmail.com

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A fully parameterized and generic Verilog implementation of the suggested modular SRAM-based indirectly-indexed 2D hierarchical-search BCAM (II2DCAM),together with other approaches are provided as open source hardware. A run-in-batch flow manager to simulate and synthesize various designs with various parameters in batch using Altera's ModelSim and Quartus is also provided.

LICENSE: BSD 3-Clause ("BSD New" or "BSD Simplified") license.

Please refer to the full paper for more information: A. M.S. Abdelhadi and G. G.F. Lemieux, "Modular SRAM-based Binary Content-Addressable Memories," he 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM'2015), May 2015. http://www.ece.ubc.ca/~lemieux/publications/abdelhadi-fccm2015.pdf